Tags : Browse Projects

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Milkymist

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  Analyzed about 23 hours ago

The project develops a stand-alone device in a small form factor that is capable of rendering MilkDrop-esque visuals effects in real time, with a high level of interaction with many sensors and using live audio and video streams as a base. Open source components and design tools have been developed ... [More] or used as much as possible. A system-on-chip implemented in a FPGA has been chosen for meeting this goal at the IP core level. The flexibility of the FPGA enables advanced users to modify the design, and also permits compact integration of many interfaces (MIDI, OSC, DMX512, analog sensors, video inputs), making Milkymist™ a platform of choice for the mobile VJ. The design is also highly modular and documented, making the code easy to re-use in other open source system-on-chips. [Less]

95.8K lines of code

0 current contributors

over 9 years since last commit

4 users on Open Hub

Inactive
5.0
 
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Licenses: eGPL, GNU_Free_..., gpl3

HDMI2USB

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Claimed by TimVideos.us - Live Event S... Analyzed 3 months ago

Hardware based on a Xilinx Spartan 6 FPGA for capturing HDMI and DVI data.

121M lines of code

13 current contributors

almost 4 years since last commit

2 users on Open Hub

Activity Not Available
0.0
 
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connectal

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  Analyzed 1 day ago

Connectal makes it easy to develop hardware-accelerated software using FPGAs. Define the hardware/software interface, write the HDL, write the software, build it and test it. No drivers required! Connectal currently supports Xilinx Virtex, Kintex, and especially Zynq FPGAs as well as Altera ... [More] FPGAs. We develop our hardware using Bluespec System Verilog. [Less]

70.8K lines of code

3 current contributors

5 months since last commit

2 users on Open Hub

Very Low Activity
0.0
 
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PicoBlaze-Library

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  Analyzed about 20 hours ago

The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a Chip (SoC or SoFPGA).

15.6K lines of code

0 current contributors

over 8 years since last commit

1 users on Open Hub

Inactive
5.0
 
I Use This

PoC-Library

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  Analyzed about 3 hours ago

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

52.9K lines of code

2 current contributors

about 4 years since last commit

1 users on Open Hub

Inactive
5.0
 
I Use This

opbasm

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  Analyzed about 10 hours ago

Opbasm is a free cross-platform assembler for the PicoBlaze-3 (PB3) and PicoBlaze-6 (PB6) microcontrollers provided by Xilinx. It will run readily on any platform with a Python interpreter. Opbasm provides a better performing solution to assembling PicoBlaze code without resorting to DOS or Windows ... [More] emulation to run the native KCPSM assemblers. [Less]

9.59K lines of code

2 current contributors

5 months since last commit

1 users on Open Hub

Very Low Activity
5.0
 
I Use This

pyIPCMI

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  Analyzed about 5 hours ago

A Python-based IP Core Management Infrastructure.

16.7K lines of code

1 current contributors

over 4 years since last commit

1 users on Open Hub

Inactive
0.0
 
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Solution-StopWatch

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  Analyzed about 19 hours ago

Professional VHDL Class Solution - StopWatch

3.64K lines of code

0 current contributors

almost 2 years since last commit

1 users on Open Hub

Very Low Activity
0.0
 
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Licenses: No declared licenses

FPGALink

  Analyzed about 13 hours ago

The aim of the FPGALink project is to provide a hardware abstraction layer for hardware involving an FPGA connected to a computer over USB, to abstract core functionality like FPGA-programming and subsequent host-FPGA communication. It doesn't matter whether the hardware uses an AVR, an FX2LP or an ... [More] ARM-based micro for its USB interface. It doesn't matter whether the FPGA is from Xilinx or Altera or Lattice or whomever. It doesn't matter whether the interface between them is a fast 43MiB/s parallel synchronous interface, a much slower EPP interface or some sort of USART connection. The cross-platform, cross-language host-side API is the same, and the FPGA-side (VHDL or Verilog) FIFO interface is the same, so you can easily port your design to a new FPGA devkit or to your own custom PCB. [Less]

32.8K lines of code

0 current contributors

about 6 years since last commit

1 users on Open Hub

Inactive
0.0
 
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Licenses: GNU_Gener..., gpl3_or_l..., lgpv3_or_...

fpgajtag

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  Analyzed about 17 hours ago

A simple jtag programming tool that has been verified on a variety of Xilinx Series7 platforms. It also supports interacting with the logic and gathering traces via BscanE2 primitives.

3.52K lines of code

0 current contributors

almost 2 years since last commit

1 users on Open Hub

Very Low Activity
0.0
 
I Use This