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Analyzed 1 day ago. based on code collected 1 day ago.

Project Summary

IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany

Tags

aldec altera arithmetic cross-platform fifo fpga i2c ipcore lattice library mentorgraphics open-source python3 sdram simulation toolchain verification vga vhdl xilinx

Apache License 2.0
Permitted

Commercial Use

Modify

Distribute

Place Warranty

Sub-License

Private Use

Use Patent Claims

Forbidden

Hold Liable

Use Trademarks

Required

Include Copyright

State Changes

Include License

Include Notice

These details are provided for information only. No information here is legal advice and should not be used as such.

Project Security

Vulnerabilities per Version ( last 10 releases )

There are no reported vulnerabilities

Project Vulnerability Report

Security Confidence Index

Poor security track-record
Favorable security track-record

Vulnerability Exposure Index

Many reported vulnerabilities
Few reported vulnerabilities

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About Project Security

Languages

VHDL
86%
XML
5%
10 Other
9%

30 Day Summary

Jun 26 2025 — Jul 26 2025

12 Month Summary

Jul 26 2024 — Jul 26 2025