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Analyzed about 11 hours ago. based on code collected 1 day ago.

Project Summary

Connectal makes it easy to develop hardware-accelerated software using FPGAs.

Define the hardware/software interface, write the HDL, write the software, build it and test it. No drivers required!

Connectal currently supports Xilinx Virtex, Kintex, and especially Zynq FPGAs as well as Altera FPGAs.

We develop our hardware using Bluespec System Verilog.

Tags

fpga vivado xilinx zynq

MIT License
Permitted

Commercial Use

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These details are provided for information only. No information here is legal advice and should not be used as such.

Project Security

Vulnerabilities per Version ( last 10 releases )

There are no reported vulnerabilities

Project Vulnerability Report

Security Confidence Index

Poor security track-record
Favorable security track-record

Vulnerability Exposure Index

Many reported vulnerabilities
Few reported vulnerabilities

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About Project Security

Languages

C++
27%
C
24%
Python
20%
14 Other
29%

30 Day Summary

Feb 25 2024 — Mar 26 2024

12 Month Summary

Mar 26 2023 — Mar 26 2024
  • 3 Commits
    Down -19 (86%) from previous 12 months
  • 2 Contributors
    Down -2 (50%) from previous 12 months

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