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Commits
: Listings
Analyzed
11 months
ago. based on code collected
about 3 years
ago.
Mar 09, 2021 — Mar 09, 2022
Showing page 1,686 of 1,750
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Contributor
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Code Location
Date
Corrected typo on capacitance of switch
Jason Luu
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about 12 years ago
Aligned power models from k6_frac_N10_mem32K over to carry chain models
Jason Luu
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about 12 years ago
git-svn-id: https://vtr-verilog-to-routing.googlecode.com/svn/trunk@1830 8e3573b8-cf2c-4f14-ef6d-137439e28b8b
Vaughn Betz
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about 12 years ago
Updates to use Jeff G's n/p ratio, and Jeff's C values.
Vaughn Betz
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about 12 years ago
This fixes VC++ compile error caused by unresolvable data types. Doesn't cause an error (or warning even) in gcc.
Jason Luu
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about 12 years ago
Fixed/improved handling of colored wires in show command
Clifford Wolf
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about 12 years ago
Added support for @<set-name> in expand select ops (%x, %ci, %co)
Clifford Wolf
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about 12 years ago
Removed 4096 bytes limit for size of command from script file
Clifford Wolf
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about 12 years ago
Added -color <color> <selection> option to show command
Clifford Wolf
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about 12 years ago
Fixed "select" for "%%" stmt with emty stack
Clifford Wolf
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about 12 years ago
Added "script" command
Clifford Wolf
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about 12 years ago
Now only use value from "initial" when no matching "always" block is found
Clifford Wolf
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about 12 years ago
Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
Clifford Wolf
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about 12 years ago
Added test cases from 2012 paper on comparison of foss verilog synthesis tools
Clifford Wolf
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about 12 years ago
Added k68 (m68k compatible cpu) test case from verilator
Clifford Wolf
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about 12 years ago
More GVariant conversions
Bert Vermeulen
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about 12 years ago
fix options setting to use GVariant
Bert Vermeulen
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about 12 years ago
avoid deprecated struct sr_rational
Bert Vermeulen
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about 12 years ago
Improved opt_share for reduce cells
Clifford Wolf
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about 12 years ago
Improved opt_share for commutative standard cells
Clifford Wolf
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about 12 years ago
Added EXTRA_TARGETS Makefile variable
Clifford Wolf
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about 12 years ago
Improved Makefile: Added ENABLE_* switches
Clifford Wolf
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about 12 years ago
Implemented TCL support (only via -c option at the moment)
Clifford Wolf
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about 12 years ago
Improved subcircuit verbose output (added portmapper results)
Clifford Wolf
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about 12 years ago
Fixed svgviewer hacks for builtin files
Clifford Wolf
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about 12 years ago
Added proper TECHMAP_FAIL support and added support for the celltype attribute in the map file
Clifford Wolf
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about 12 years ago
Implemented proper handling of stub placeholder modules
Clifford Wolf
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about 12 years ago
Keep viewport transform stable on reload in yosys-svgviewer
Clifford Wolf
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about 12 years ago
Added check: only one module for "show" unless format is "ps"
Clifford Wolf
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about 12 years ago
Now using SVG and yosys-svgviewer per default in show command
Clifford Wolf
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about 12 years ago
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