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Analyzed 12 months ago. based on code collected about 3 years ago.
Mar 09, 2021 — Mar 09, 2022
Commit Message Contributor Files Modified Lines Added Lines Removed Code Location Date
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Version 4.426
Jeff Rudolph
More... about 12 years ago
Added "flatten" pass
Clifford Wolf
More... about 12 years ago
Fixed handling of positional module parameters
Clifford Wolf
More... about 12 years ago
Fixed hierarchy pass for hierarchies of parametric modules
Clifford Wolf
More... about 12 years ago
Only use sha1 checksums for names of parametric modules when the verbose form is to long
Clifford Wolf
More... about 12 years ago
Changed name of toronto 20 to reflect what it actually does - multiclock experiments
Jason Luu
More... about 12 years ago
Change arch file to match new structure
Jason Luu
More... about 12 years ago
Update golden results to reflect different arch delays
Jason Luu
More... about 12 years ago
changed pass requirements to pass_requirements_chain
Jason Luu
More... about 12 years ago
git-svn-id: https://vtr-verilog-to-routing.googlecode.com/svn/trunk@1883 8e3573b8-cf2c-4f14-ef6d-137439e28b8b
Jason Luu
More... about 12 years ago
git-svn-id: https://vtr-verilog-to-routing.googlecode.com/svn/trunk@1882 8e3573b8-cf2c-4f14-ef6d-137439e28b8b
Jason Luu
More... about 12 years ago
changed pass requirements to chain
Jason Luu
More... about 12 years ago
Added pass requirements for carry chains
Jason Luu
More... about 12 years ago
Added carry chain experiment Enabled multi-clock and verilog writer experiments
Jason Luu
More... about 12 years ago
Update config and golden results for timing small given realistic arch file
Jason Luu
More... about 12 years ago
Arch files updated to realistic numbers, must update corresponding reg tests
Jason Luu
More... about 12 years ago
Update QoR for nightly regression. Results are slower because realistic arch is slower.
Jason Luu
More... about 12 years ago
molecule mcnc redundant, remove
Jason Luu
More... about 12 years ago
Fix bug in power code, when using sparse crossbars
Jeffrey Goeders
More... about 12 years ago