Stephen Williams

Oakland, CA, USA

Managed Projects

Icarus Verilog

Analyzed about 15 hours ago

Icarus Verilog is an open source Verilog compiler that supports the IEEE-1364 Verilog HDL including IEEE1364-2005 plus extensions.

337K lines of code

12 current contributors

22 days since last commit

7 users on Open Hub

Moderate Activity

I Use This

Mostly written in coq

Tags hdl simulate simulation synthesis verilog veriloghdl

Icarus SIMBUS

Analyzed 1 day ago

SIMBUS is a simulation tool for SoC and system level simulation of multiple devices connected by bus nodes. Client simulation models may be written in Verilog and C/C++.

15K lines of code

1 current contributors

almost 6 years since last commit

0 users on Open Hub

Inactive

I Use This

Mostly written in C

Tags c cad eda verilog