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SIMULinho

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Inactive

Analyzed 1 day ago. based on code collected 1 day ago.

Project Summary

Simulador integrado iVerilog com interface QT, permite visualizar internamente e controlar a simulação do RISCuinho usando iVerilog

Tags

fpga ieee1394 iverlog simulation synthesiser verilog

In a Nutshell, SIMULinho...

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has had 8 commits made by 2 contributors
representing 110 lines of code
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is mostly written in C++
with a very low number of source code comments
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has a codebase with a very short history
maintained by nobody
with stable Y-O-Y commits
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took an estimated 1 years of effort (COCOMO model)
starting with its first commit in August, 2021
ending with its most recent commit over 4 years ago

Quick Reference

Code Locations:

https://github.com/RISCuinho/SIM...

Similar Projects:

This Project has No vulnerabilities Reported Against it

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Code

Lines of Code

Activity

Commits per Month

Community

Contributors per Month

Languages

Make	66%
C++	19%
C	13%
coq	2%

30 Day Summary

Nov 3 2025 — Dec 3 2025

0 Commits
0 Contributors

12 Month Summary

Dec 3 2024 — Dec 3 2025

0 Commits
0 Contributors

Most Recent Contributors

...er - Estudio 3

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