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Moderate Activity
Commits
: Listings
Analyzed
about 5 hours
ago. based on code collected
about 20 hours
ago.
Jul 30, 2024 — Jul 30, 2025
Showing page 12 of 133
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Code Location
Date
src: Add cover point for corner-case.
ondrej.ille
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over 1 year ago
test: Extend STATUS[TXPE] feature test to cover Parity ERR -> EMpty transitions of TXT Buffers.
ondrej.ille
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over 1 year ago
test: Add txt_buffer_transitions feature test.
ondrej.ille
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over 1 year ago
src: Optimize TXT Buffer next_state decoder not to have implicit unreachable FSM state transitions.
ondrej.ille
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over 1 year ago
test: Batch of new coverage exclusions.
ondrej.ille
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over 1 year ago
src: Update rst_reg to provide controllable reset in scan mode.
ondrej.ille
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over 1 year ago
sim: Use 8 TXT Buffers for compliance tests to get good coverage on TXT Buffer RAM internals.
ondrej.ille
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over 1 year ago
test: Add TX Arbitrator consistency test 2.
ondrej.ille
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over 1 year ago
src: Typo fix in cover points of TX Arbitrator.
ondrej.ille
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over 1 year ago
test: First batch of TXT Buffer tests improvements for FSM transition coverage.
ondrej.ille
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over 1 year ago
test: Add latest compliance test library with refactored names and batch of test fixes.
ondrej.ille
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over 1 year ago
sim: Pass reset_buffer_rams to TB and DUT. Set it to true for FAST FPGA run.
ondrej.ille
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over 1 year ago
test: Extend tst mem access testing with attempt to access memories out of test mode.
ondrej.ille
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over 1 year ago
test: Add scripts for regression run.
ondrej.ille
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over 1 year ago
test: Add SETTINGS_NISOFD feature test.
ondrej.ille
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over 1 year ago
sim: Split compliance min run into two runs.
ondrej.ille
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over 1 year ago
test: Coverage exclude - first version.
ondrej.ille
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over 1 year ago
test: Adjust last two compliance_max tests to require BRP of 3 too.
ondrej.ille
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almost 2 years ago
gitignore: Add Coverage folder
ondrej.ille
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almost 2 years ago
sim, test: Get back to original timing for TYP compliance suite. Debug all TYP compliance tests. Skip exit code check to workaround VCS bug
ondrej.ille
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almost 2 years ago
test: Add FinishOnError support
ondrej.ille
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almost 2 years ago
test: Swap parameter readout to avoid false matching due to the same prefix.
ondrej.ille
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almost 2 years ago
test: Fix shadowing warning
ondrej.ille
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almost 2 years ago
sim, test: Add compliance library with VCS VHPI support. Fix time to conversion for PLI giving undefined value that VCS could not correctly convert.
ondrej.ille
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almost 2 years ago
sim, test: Re-order seed initialization, allow disabing randomization for specific targets.
Ondrej Ille
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almost 2 years ago
ci: Add missing sim_time concat
Ondrej Ille
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almost 2 years ago
ci: Set env var to pick VUnit target in CI.
Ondrej Ille
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almost 2 years ago
test,ci: Pass Junit result natively. Adapt Functional coverage directory.
Ondrej Ille
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almost 2 years ago
sim, test: Flip to new run.py that takes RTL/TB from ts_sim_config
ondrej.ille
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almost 2 years ago
Add setup_env for TS flow. Set env var flipping between Vunit/VCS target selection.
ondrej.ille
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almost 2 years ago
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