Project Summary
Open Source VHDL Verification Methodology (OSVVM) is an intelligent testbench methodology that allows mixing of “Intelligent Coverage” (coverage driven randomization) with directed, algorithmic, file based, and constrained random test approaches. The methodology can be adopted in part or in whole as needed. With OSVVM you can add advanced verification methodologies to your current testbench without having to learn a new language or throw out your existing testbench or testbench models.
In a Nutshell, OSVVM...
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has a well established, mature codebase
maintained by a large development team
with decreasing Y-O-Y commits -
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took an estimated 36 years of effort (COCOMO model)
starting with its first commit in December, 2015
ending with its most recent commit 10 days ago
Apache License 2.0
Permitted
Commercial Use
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Use Patent Claims
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Hold Liable
Use Trademarks
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Include Copyright
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Include License
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These details are provided for information only. No information here is legal advice and should not be used as such.
Project Security
Vulnerabilities per Version ( last 10 releases )
There are no reported vulnerabilities
Project Vulnerability Report
Security Confidence Index
Vulnerability Exposure Index
Did You Know...
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65% of companies leverage OSS to speed application development in 2016
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nearly 1 in 3 companies have no process for identifying, tracking, or remediating known open source vulnerabilities
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30 Day SummaryNov 22 2025 — Dec 22 2025
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12 Month SummaryDec 22 2024 — Dec 22 2025
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