2
I Use This!
Moderate Activity
Analyzed 1 day ago. based on code collected 3 days ago.

Project Summary

No description has been added for this project. Add description

Tags

eda implementation layers simulation stack synthesis verilog vhdl

In a Nutshell, Electronic Design Automation Abstract...

Project Security

Vulnerabilities per Version ( last 10 releases )

There are no reported vulnerabilities

Project Vulnerability Report

Security Confidence Index

Poor security track-record
Favorable security track-record

Vulnerability Exposure Index

Many reported vulnerabilities
Few reported vulnerabilities

Did You Know...

  • ...
    nearly 1 in 3 companies have no process for identifying, tracking, or remediating known open source vulnerabilities
  • ...
    check out hot projects on the Open Hub
  • ...
    in 2016, 47% of companies did not have formal process in place to track OS code
  • ...
    learn about Open Hub updates and features on the Open Hub blog
About Project Security

Languages

Python
68%
XML
19%
PowerShell
7%
11 Other
6%

30 Day Summary

Jan 30 2026 — Mar 1 2026

12 Month Summary

Mar 1 2025 — Mar 1 2026
  • 439 Commits
    Up + 163 (59%) from previous 12 months
  • 2 Contributors
    Down -3 (60%) from previous 12 months