Direct Python interface to Altera SLD Mega-function
The goal of this project is to create a python module that performs USB communication with the nodes of an SLD (System Level Debug) mega-function within an Altera FPGA.
Data objects for reading and writing use the BitArray class from the bitstring module. This allows exceptional flexibility and ease in formatting and decoding the data.
30 Day SummaryJul 13 2026 — Aug 12 2026
|
12 Month SummaryAug 12 2025 — Aug 12 2026
|