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Commits : Listings

Analyzed about 2 hours ago. based on code collected about 2 hours ago.
Apr 29, 2024 — Apr 29, 2025
Commit Message Contributor Files Modified Lines Added Lines Removed Code Location Date
Translated sections 4 and 5.
Moshe Berman
More... over 9 years ago
Included anti-aliasing changes from hausen's fork
Roberto Rigamonti
More... over 9 years ago
Fixed small window bug
Theo Kluter
More... over 9 years ago
Changed the default apearance of a sub-circuit such taht: 1) All inputs will be alligned to the left hand side of the block. 2) All outputs will be alligned to the right hand side of the block. 3) The small "semi pin 1" indicator is removed. 4) All the labels of the input(s) and output(s) are shown in the rectangle
Theo Kluter
More... over 9 years ago
- Added dynamic and bigger points on wire and bus crossings - Fixed highlighting of busses (they were highlighted with the width of a wire not changing them)
Theo Kluter
More... over 9 years ago
Merge pull request #58 from MosheBerman/master
REDS
More... over 9 years ago
Added a PDF version.
Moshe Berman
More... over 9 years ago
Began translating the tutorial.
Moshe Berman
More... over 9 years ago
Changed version number
Roberto Rigamonti
More... over 9 years ago
Added a new board to FPGA commander (MAX V Console) NOTE: The previous commit (TCL modifications) refers to feature #852
Yann Sutter
More... over 9 years ago
Added a new board for FPGA Commander (MAX V Console)
Yann Sutter
More... over 9 years ago
Now segregating the force procedure and the examine procedure in the propagate function of the Tcl components, in order to fix an issue in simulation mode with the REDS console not refreshing correctly It is now possible to set a flag in the REDS consoles indicating that Logisim is in charge to run the simulation Added a missing logging library Added two UML sequences diagrams that more or less represent the communication sequence between Logisim, the Tcl wrapper, the console and Questasim Note: The force procedure described above is performed when a new simulation tick is recieved, and the examine procedure is performed otherwise
Yann Sutter
More... over 9 years ago
Avoid opening new window on open recent if current project untouched
Roberto Rigamonti
More... over 9 years ago
Avoid opening new window on open if current project untouched
Roberto Rigamonti
More... over 9 years ago
Fixed bug #52
Roberto Rigamonti
More... over 9 years ago
Update README.md
REDS
More... over 9 years ago
bugfix: FPGA-commander crashes when no settings file is present.
Theo Kluter
More... over 9 years ago
Added the possibility to add external board description files to the FPGA commander by use of the "others" tab. These external file names are stored in the settings file and are also available after the program has closed. One "feature" to be added: The removal of external board description files. Currently you have to remove them with an editor from your settings file.
Theo Kluter
More... over 9 years ago
Added basic board description file of the Cyclone V GX starter board
Theo Kluter
More... over 9 years ago
Added BFH megafunction library to be used with the practical work sessions
Theo Kluter
More... over 9 years ago
Added GECKO4Education Board
Theo Kluter
More... over 9 years ago
Updated version
Roberto Rigamonti
More... over 9 years ago
Merge branch 'master' of https://github.com/reds-heig/logisim-evolution
Roberto Rigamonti
More... over 9 years ago
Updated version
Roberto Rigamonti
More... over 9 years ago
Update README.md
REDS
More... over 9 years ago
Reptar image in fpga commander updated
Sylvain.krieg
More... over 9 years ago
Returned to starting point in script
Roberto Rigamonti
More... almost 10 years ago
Cleaned images wiki
Roberto Rigamonti
More... almost 10 years ago
Added wiki images
Roberto Rigamonti
More... almost 10 years ago
Merge branch 'master' of https://github.com/reds-heig/logisim-evolution
Roberto Rigamonti
More... almost 10 years ago