Coordinating gateware development among many international collaborators is becoming a very widespread problem. Guaranteeing gateware synthesis with Place and Route reproducibility and assuring traceability of binary files is paramount.
Hog tackles these issues by exploiting advanced git features and integrating itself with HDL IDEs: Xilinx Vivado, Xilinx ISE (planAhead), Intel Quartus, Microchip Libero and Lattice Diamond. The integration with these tools intends to reduce as much as possible useless overhead work for the developers.
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State Changes
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These details are provided for information only. No information here is legal advice and should not be used as such.
30 Day SummaryApr 28 2025 — May 28 2025
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12 Month SummaryMay 28 2024 — May 28 2025
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