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Analyzed about 11 hours ago. based on code collected about 11 hours ago.

Commit Message	Contributor	Files Modified	Lines Added	Lines Removed	Code Location	Date
Aug 11, 2024 — Aug 11, 2025 Showing page 142 of 1,160 Search / Filter on:
hw/arm/digic: prepare DIGIC-based boards support	Antony Pavlov	More...				over 11 years ago
hw/arm/digic: add timer support	Antony Pavlov	More...				over 11 years ago
target-arm: A64: add support for logical (immediate) insns	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for 1-src REV insns	Claudio Fontana	More...				over 11 years ago
target-arm: A64: add support for 1-src CLS insn	Claudio Fontana	More...				over 11 years ago
target-arm: A64: add support for 1-src RBIT insn	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for 1-src data processing and CLZ	Claudio Fontana	More...				over 11 years ago
target-arm: A64: add support for bitfield insns	Claudio Fontana	More...				over 11 years ago
host-utils: add clrsb32/64 - count leading redundant sign bits	Claudio Fontana	More...				over 11 years ago
target-arm: A64: add support for 2-src shift reg insns	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for 2-src data processing and DIV	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for logical (shifted register)	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for ADR and ADRP	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for EXTR	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for conditional branches	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for conditional select	Claudio Fontana	More...				over 11 years ago
target-arm: A64: add support for 'test and branch' imm	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for compare and branch imm	Alexander Graf	More...				over 11 years ago
target-arm: A64: add support for BR, BLR and RET insns	Alexander Graf	More...				over 11 years ago
target-arm: A64: provide skeleton for a64 insn decoding	Claudio Fontana	More...				over 11 years ago
target-arm: Support fp registers in gdb stub	Peter Maydell	More...				over 11 years ago
target-arm: A64: expand decoding skeleton for system instructions	Claudio Fontana	More...				over 11 years ago
target-arm: A64: add support for B and BL insns	Alexander Graf	More...				over 11 years ago
target-arm: A64: add stubs for a64 specific helpers	Alexander Graf	More...				over 11 years ago
target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()	Peter Maydell	More...				over 11 years ago
target-arm: A64: provide functions for accessing FPCR and FPSR	Peter Maydell	More...				over 11 years ago
default-configs: Add config for aarch64-softmmu	Peter Maydell	More...				over 11 years ago
target-arm: A64: add set_pc cpu method	Alexander Graf	More...				over 11 years ago
configure: Enable KVM for aarch64 host/target combination	Peter Maydell	More...				over 11 years ago
target-arm: Clean up handling of AArch64 PSTATE	Peter Maydell	More...				over 11 years ago

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