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Analyzed 1 day ago. based on code collected 1 day ago.

Commit Message	Contributor	Files Modified	Lines Added	Lines Removed	Code Location	Date
Nov 02, 2025 — Dec 02, 2025 Showing page 1 of 2 Search / Filter on:
Remove internal signal variable for inertial actual process	Nick Gasson	More...				4 days ago
Reduce number of calls to lower_dependencies	Nick Gasson	More...				4 days ago
Avoid unnecessary comparisons in vtype_eq	Nick Gasson	More...				4 days ago
Avoid code generation for processes in cloned blocks	Nick Gasson	More...				4 days ago
Cache most recently analysed architecture	Nick Gasson	More...				4 days ago
Avoid repeated calls to lib_get_qualified	Nick Gasson	More...				4 days ago
Add optimised functions for copying tree arrays	Nick Gasson	More...				4 days ago
Fix elaboration memory leaks	Nick Gasson	More...				4 days ago
Structure sharing for architecture instances	Nick Gasson	More...				5 days ago
Refactor component binding	Nick Gasson	More...				5 days ago
Handle unary operations on Verilog reals	Nick Gasson	More...				7 days ago
Parse remaining Verilog primitive gate types	Nick Gasson	More...				7 days ago
Handle non-constant values in Verilog time expressions	Nick Gasson	More...				7 days ago
Fix crash with 'stable used on record with unconstrained field	Nick Gasson	More...				9 days ago
Adjust overriding of instance generics	Nick Gasson	More...				10 days ago
Structure sharing for component instances	Nick Gasson	More...				10 days ago
Do not assume external name indices are always folded	Nick Gasson	More...				11 days ago
Remove object_copy_root_closure	Nick Gasson	More...				11 days ago
Refactor handling of type bounds in VHPI	Nick Gasson	More...				11 days ago
Do not fully expand for-generate loops	Nick Gasson	More...				12 days ago
Do not reevaluate context in lower_subprogram_arg	Nick Gasson	More...				12 days ago
Use lower_context_for_mangled only for package subprograms	Nick Gasson	More...				12 days ago
Replace implicit localparam datatype with inferred type	Nick Gasson	More...				13 days ago
Handle out-of-range part selects	Nick Gasson	More...				14 days ago
Sync NEWS.md from 1.18 branch	Nick Gasson	More...				14 days ago
Fix erroneous structure sharing in nested record initialisation	Nick Gasson	More...				14 days ago
Allow constant record elements in case choice (#1349)	NikLeberg	More...				14 days ago
Refactor lowering of Verilog selects	Nick Gasson	More...				18 days ago
Fix incosistency between argument parsed and argument shown in help (#1346)	BenediktO	More...				19 days ago
Parse attribute name in qualified expression type mark	Nick Gasson	More...				25 days ago

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