A hardware H.264 video encoder written in VHDL suited to non-interlaced IP cameras and megapixel cameras. Designed to be synthesized into an FPGA or ASIC. Fast and small. Modular. Extensible.
The Open Hub computes statistics on FOSS projects by examining source code and commit history in source code management systems. The source code for this project has been located, but the analysis isn't complete. Feel free to check its progress.
This Project has No vulnerabilities Reported Against it
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Code analysis has not completed
The Open Hub computes statistics on FOSS projects by examining source code and commit history in source code management systems. The source code for this project has been located, but the analysis isn't complete. Feel free to check its progress.
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