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Commits : Listings

Analyzed 1 day ago. based on code collected 1 day ago.
Sep 13, 2025 — Sep 13, 2026
Commit Message Contributor Files Modified Lines Added Lines Removed Code Location Date
TeeRISCISelLowering::LowerOperation is yet to be implemented, so add an assert() to aid debugging. More... about 13 years ago
Create a new class - Return. And create RET, IRET and ERET instructions based on this. More... about 13 years ago
Made RET as real instruction(added a new opcode). Created IRET, ERET instructions also. More... about 13 years ago
More code rearrangements More... about 13 years ago
Move definitions near their usage. More... about 13 years ago
Add LoadRI and StoreRI classes. More... about 13 years ago
Delete some extra whitespaces and change some formats. More... about 13 years ago
Created ArithLogic and ArithLogicImm classes and used them in arithmetic and logical instructions. More... about 13 years ago
Created Arith class so that most of the Arithematic instruction properties can be initiated in a single place. More... about 13 years ago
Set default value to rExtra and ConditionCode in F1 class. More... about 13 years ago
Modified Register-Register instruction format(F1) to have sign flag. More... about 13 years ago
Added MUL, DIV and MOD instruction definitions. More... about 13 years ago
Added AND_IMM instruction More... about 13 years ago
Update Opcode numbers from the TeeRISC spec. More... about 13 years ago
Modified F1 instructions to use ZERO.Num for Extra register rather than 0. More... about 13 years ago
RET instruction is not Pseudo instruction but a codegen only instruction. So modify it accordingly - instruction encoding: IP = LR + ZERO More... about 13 years ago
Mark pseudo instructions ADJCALLSTACKDOWN and ADJCALLSTACKUP as for codegen only. More... about 13 years ago
Lower the pseudo instructions - ADJCALLSTACKDOWN and ADJCALLSTACKUP More... about 13 years ago
Added LSHIFT_IMM and RSHIFT_IMM instructions to fix 32bit imm encoding. More... about 13 years ago
Remove SETHI pseudo instruction and take care of 32bit immediate loading through pattern replacement More... about 13 years ago
Added SUB instruction. More... about 13 years ago
Added the all logical instructions except NOR. More... about 13 years ago
Removed unused operand simm16 More... about 13 years ago
Replace access width numbers in F3 class instruction with macro. More... about 13 years ago
Replace ConditionCode numbers with macros More... about 13 years ago
Statically define rS1 and rS2 registers as ZERO in CALL instruction More... about 13 years ago
Fix emitPrologue() to correctly emit instruction for storing FP in the stack. More... about 13 years ago
Minor code cleanup in DecodeMem() More... about 13 years ago
Added getMemEncoding() for memri types. More... about 13 years ago
Renamed SelectADDR to SelectAddrRegImm More... about 13 years ago