7
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Commits : Listings

Analyzed about 7 hours ago. based on code collected about 8 hours ago.
Dec 18, 2024 — Dec 18, 2025
Commit Message Contributor Files Modified Lines Added Lines Removed Code Location Date
added support for POWER8/VSX to probeFPU More... about 8 years ago
fixed missing letters More... about 8 years ago
start of power support in fpuStress.base More... about 8 years ago
new xgen archdef More... about 8 years ago
add restricted thread count option to tmemwalk More... about 8 years ago
ARM32 support, and ARM64 fixes More... about 8 years ago
fixed ARM64 name error More... about 8 years ago
fixed prototype error More... about 8 years ago
fixed trsmgen-genTrsmHead More... about 8 years ago
archdefs patched correctly for indthr 1 More... about 8 years ago
updated xgene archdefs More... about 8 years ago
patch archdef for indthr & select gcc when possible More... about 8 years ago
basic ARM64 support in probeFPU More... about 8 years ago
indthr basically works More... about 8 years ago
start of -Si indthr 1, not working yet More... about 8 years ago
tprobeFPU creates working taffinity More... about 8 years ago
converted tprobeFPU to use _tprim More... about 8 years ago
basic affinity alias probe works More... about 8 years ago
start of tprobeFPU in ttune More... about 8 years ago
cacheInfo_x86 seems to work on Intel&AMD More... about 8 years ago
cachInfo_x86 fixes for Intel wt hyperthreading enabled More... about 8 years ago
ss Merge branch 'rcwdev' of github.com:math-atlas/math-atlas into rcwdev More... about 8 years ago
intel cache works w/o hyperthreading More... about 8 years ago
i264AVXp16 archdefs added More... about 8 years ago
basic cpydrv works ryzen8 More... about 8 years ago
assert 625 fixed, now 602 fails More... about 8 years ago
fixed recursion, still fails More... about 8 years ago
got new ordering plugged in for seg fault More... about 8 years ago
more work on SetCopyOrder More... about 8 years ago
start of new coherence alg More... about 8 years ago